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COA511S - COMPUTER ORGANISATION AND ARCHITECTURE - 2ND OPP SUPL - JAN 2023 |
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nAmI Bl A un IVE RSITY
OF SCIEnCE Ano TECHnOLOGY
FACULTY OF COMPUTING AND INFORMATICS
DEPARTMENT OF COMPUTER SCIENCE
QUALIFICATION: BACHELOR OF COMPUTER SCIENCE, BACHELOR OF COMPUTER IN CYBER
SECURITY & BACHELOR OF INFORMATICS
QUALIFICATION CODE: 07BACS, 07BCCS &
07BAIF
LEVEL: 5
COURSE: COMPUTER ORGANISATION
AND ARCHITECTURE
COURSE CODE: COASllS
DATE: JANUARY 2023
PAPER: THEORY
DURATION: 2H
MARKS: 100
SECOND OPPORTUNITY /SUPPLEMENTARY EXAMINATION QUESTION PAPER
EXAMINER(S} MR. JULIUS SILAA
MS. JOVITA MATEUS
MS. VICTORIA SHAKELA
MS. HELENA HAINANA
MR. THOMAS SHOMWELE
MODERATOR: MR. SIMON MUCHINENYIKA
THIS QUESTION PAPER CONSISTS OF 5 PAGES
(Excluding this front page)
INSTRUCTIONS
1. Answer ALL the questions on the answer scripts.
2. Write clearly and neatly.
3. Number the answers clearly.
PERMISSIBLE MATERIALS
1. Calculator.
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SECTION A [15 MARKS]: Each Question Weighs 1 Mark.
1. RAM must be provided with a constant power supply.
[True/False]
2. The prefect buffer is a memory cache located on the RAM chip. [True/False]
3. 1/0 channels are commonly seen on microcomputers, whereas 1/0
controllers are used on mainframes.
[True/False]
4. An interrupt is a hardware-generated signal to the processor.
[True/False]
5. In any number, the rightmost digit is referred to as the most significant digit.
[True/False]
6. Microprogramming eases the task of designing and implementing the control
Unit and provides support for the family concept.
[True/False]
+
7. The Instruction Set Architecture (ISA) defines the machine language
instructions that a computer can follow.
[True/False]
8. Cache memory is a much faster memory than the register file.
[True/False]
9. Overflow can only occur if there is a carry.
[True/False]
10. Interrupt is one of the five states for a process.
[True/False]
11 Memory swapping is a situation where none of the processes in memory
are in the ready state.
[True/False]
12 A sequence of hexadecimal digits can be thought of as representing an integer
in base 2.
[True/False]
13. The instruction set is the programmer's means of controlling the processor.
[True/False]
14. Memory references are faster than register references.
[True/False]
15. The Kernel is a special type of programming language used to provide instructions to
the monitor.
[True/False]
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SECTION B [15 MARKS]: Each Question Weighs 1 Mark.
1. In an optical CD, the areas between pits are called ___ _
A. lands
C. cylinders
B. sectors
D. strips
2. The ____
is the processor component that temporarily holds data and instructions
waiting to be processed by the ALU.
A. registers
B. CPU interconnection
C. ALU
D. system bus
3. Binary 10100101 is hexadecimal ___
A.O
C. A 5
_
B. 5
D.10
4. The operand ____
A.NOT
C. NANO
yields true if either or both of its operands are true.
B.AND
D. OR
5. In floating-point arithmetic, when a positive exponent exceeds the maximum possible
exponent. It is known as ____
_
A. exponent underflow
C. significand underflow
B. exponent overflow
D. significand overflow
6. ____
is implemented with combinational circuits.
A. nano memory
C. read only memory
B. random access memory
D. no memory
7.The ____
state.
exists in one of two states and, in the absence of input, remains in that
A. assert
C. decoder
B. complex PLO
D. flip-flop
8.____
are used in digital circuits to control signal and data routing.
A. Multiplexers
C. Flip-flops
B. Program counters
D. Gates
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9.The ____
specifies the operation to be performed.
A. source operand reference
C. next instruction reference
B. opcode
D. processor register
10. All instructions in the ARM architecture
format.
A. 8
C. 32
are -----
B. 16
D. 64
bits long and follow a regular
11.The ----
processor.
controls the movement of data and instructions into and out of the
A. control unit
C. shifter
B. ALU
D. branch
12.The ____
contains the address of an instruction to be fetched.
A. instruction register
C. memory buffer register
B. memory address register
D. program counter
13.____
registers may be used only to hold data and cannot be employed in the
calculation of an operand address.
A. General purpose
C. Address
B. Data
D. Condition code
14. A ____
is a dispatch able unit of work within a process that includes a
processor context and its own data area for a stack.
A. Process
C. Thread
B. Process switch
D. Thread switch
15. A ____
architecture is one that makes use of more, and more fine-grained
pipeline stages.
A. parallel
C. superscalar
B. superpipe lined
D. hybrid
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SECTION C [70 MARKS]: Comprehension questions.
Question 1
{a) Technological advancement in 1940 and 1950s made a significant contribution in
computer evolution. Distinguish by listing ay three distinct differences between the first
and second generation of computers
{3 marks)
{b) CPU Instructions can be divided into 3 classes. List the three classes and provide at least
one example of a typical operation of each. Class.
{6 marks)
{c) List any four, common types of computer expansion slots found in the PC's
{Please note: expansion "slots" and not expansion "cards")
(4 marks)
Question 2
a) State the two most significant reasons for embracing RAID technologies in storage
{4 marks)
b) Illustrate the concept of direct cache mapping by means of a simple diagram {5 marks)
c) Briefly explain based on your diagram how direct cache mapping scheme works
{5 marks)
d) A smartwatch RAM has 512 MB of memory. The memory in this watch is divided into
several words each 32 bytes. How many bits are needed to address any single word in
this memory? Show your work step by step
{6 marks)
Question 3
a) There are different types of operating systems. Their use depends on the type of
Computer and the type of applications that will be run on those computers.
Distinguish between the Batch OS and Interactive OS.
{4 marks)
b) List and explain the 2 main objectives of an Operating System.
{4 marks)
c) Explain your understanding of the following virtual memory concepts
i)
paging
ii)
demand paging
{4 marks)
d)What is an ultimate importance of virtual memory management scheme? {3 marks)
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r
Question 4
Addressing modes are an aspect of the instruction set architecture in most central
processing unit (CPU) designs. The various addressing modes that are defined in a
given instruction set architecture define how machine language instructions in that
architecture identify the operand(s) of each instruction.
Explain and provide one example of each of the following instruction addressing mode
(9 marks)
i)lmmediate
ii)Direct
iii)Register
Question 5
a) What is Instruction pipelining?
b) List the basic five instruction pipeline stages
(2 marks)
(3 marks)
c) Show diagrammatically how instruction pipelining is implemented in typical
modern microprocessor. Your diagram should emphasize how instructions, pipeline
stages and clock cycle are related
(8 marks)
*****END OF PAPER*****
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